1. Field of the Invention
The present invention relates to an indicator arrangement, and more particularly to an indicator arrangement for performing discrete display of an analog input voltage, utilizing a parallel-comparison analog-digital converter (A-D converter).
2. Description of the Prior Art
Conventional indicator arrangements are provided with comparators each of which receives an individually different digitalizing standard voltage as an input and an analog input signal voltage as an another input and gives a digital signal by comparing the two inputs, the digital signal being visually displayed by means of display elements such as light-emitting diodes (LEDs).
Such indicator arrangements are however associated with drawbacks of increased power consumption when the number of display modes by the display elements such as LEDs is increased as the number of comparators, display elements and drive lines therefor increases correspondingly, and also of an increased space occupied by the comparators, etc.